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ARM and RISC-V: Competition versus Synergies Workshop

This free online workshop brings together experts in ARM and RISC-V computing to share current practices in HPC hard- and software design and also discuss competition and synergies.

Time: Tue 2021-06-22 16.00 - 18.00

Location: Online


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ARM is the most successful microprocessor architecture on the planet, with its licensees shipping billions of chips a year. Emerging in 2010 from the Parallel Computing Lab at UC Berkeley in California, RISC-V is a modular architecture that allows developers to build whatever they desire on top of the core instruction set. For both Instruction Set Architectures significant efforts are being made to establish them in the area of high-performance computing.

This workshop brings together representatives from large data centers, system integrators, end-users, microprocessor designers and experts who lead efforts in developing solutions on ARM and RISC-V for today’s platforms and upcoming Exascale systems. The objective is to share current practices for both ARM and RISC-V hardware and software stacks, and to discuss how and where ARM and RISC-V can be competitors and where they can be synergistic.

For more information and to register, see .