Date: 23 Dec 2000 00:17:18 GMT From: mash@mash.engr.sgi.com (John R. Mashey) Newsgroups: comp.arch,comp.sys.ibm.hardware.chips,comp.sys.ibm.pc.hardware,comp.sys.ibm.pc.hardware.chips Subject: Re: 128bit vs 32bit 1) Looks like time for a repost of the standard discussion, but succinctly: historically, when people called a CPU "N-bits", the "N" normally meant the width the regular integer registers, NOT the width of floating-point or other special registers NOT the width of external busses NOT the width of other special datapaths NOT the size of instructions Occasionally, as in the Intel i860 (where a 32-bit CPU with a 64-bit bus was labeled a 64-bit CPU), or in games/graphics devices labeled as 128-bit devices (that normally incorporate 32- or 64-bit CPUs using the historical definitions), marketing gets the upper hand, at which point some people declare that the terminology is confused. As far as I can tell, people who actually design CPUs rarely are confused about "bittedness", and marketing diversions have been relatively rare. 2) Using the normal definition, there are lots of 32- and 64-bit CPUs; I can't think of a real 128-bit CPU, and there are certainly aren't any widely-used 128-bit micros. Moore's Law wouldn't predict a need for 128-bit (for addressing) until ~2040, and it cannot persist that long, although perhaps some non-CMOS technologies might. [Rationale: we started *needing* 64-bit micros for addressing around 1995, when we added 32 bits to the existing 32-bits so people could straightfordwardly get near/above 4GB. Moore's Law consumes 2 bits every 3 years. 32 bits / (2 bits/3 years) = 48 years. 1995+48 => ~2040. 3) It always costs more die space for wider datapaths, and it may cost cycle time, or cycle-count, if one implements wider paths than people actually need, and hence people don't do this until there are compelling reasons. At the moment, I can't think of a widely-compelling reason to have widespread use of 128-bitters before 2040, except possibly some kinds of encryption calculations, although of course some mathematicians would be quite pleased to have fast 128-bit integer multiplies and divides. Attached below is the usual historical post: =============================Article: 27876 of comp.std.c Date: Mon, 22 Dec 97 17:35:48 1997 In article <66ig6f$7to@news.inforamp.net>, pcurran@acm.gov (Peter Curran) writes: |> >The "bitness" of a CPU isn't a well-defined term but it most often |> >refers to the width of data registers used for common integer based ops. Yes, (not well-defined, but usually width of integer data registers); this has been discussed *many* times in comp.arch, and elsewhere, such "64-bit Computing" BYTE, September 1991 135-142, whose Table 1 lists relevant characteristics of 20 CPUs, which I show later |> >Machine addresses often have the same width but don't always do so and |> >C pointers are something else again (you just have to take a look at DOS |> >memory models). |> |> Agreed that "bitness" is not well defined (in fact, all but meaningless) but |> this is a definition I have never heard before. The most common definitions |> have heard refer to the number of bits transferred in parallel between the |> processor and memory (a vague concept), and the number of bits in the machine's |> physical addresses. It might be wise to stop listening to the people from which these have been heard... as they appear to know little of common usage in computer architecture. The above is an assertion that the "N" in N-bit computers means "A" or "D" bits below: From the BYTE article above: "Table 1 lists numbers for well-known computer families. For simplicity, V (Virtual address size) is given only for user-level programs. The table shows that physical address size (A) and data bus size (D) can vary within a processor family. The IBM S/360 fmaily included five data bus sizes (8 to 128 bits); the 32-bit Intel 386 is sold in 2 sizes -- 32 and 16." Table 1: The size that a microprocessor is called is generally the integer register size. Size ---ISA------ ---Implementation--- Virtadd Physadd Databus CPU Year Called Reg V A D DEC PDP 11-45 1973 16 16 16* 18 32 DEC PDP 11-70 1976 16 16 16* 22 32 DEC VAX 11/780 1978 32 32 31 32 64 IBM S/360 1964 32 32 24 24 8,16,32,64,128 IBM S/370XA 1983 32 32 31 32 128 IBM ESA/370 1988 32 32 31* 32 128 IBM RS/6000 1990 32 32 32* 32 64-128 HP PA 1986 32 32 32* 32 32-64 Intel 386DX 1985 32 32 32* 32 32 Intel 386SX 1987 32 32 32* 24 16 Intel i860 1989 64 (!) 32 32* 32 64 MIPS R2000 1986 32 32 31 32 32 MIPS R4000 1990 64 64 40-62 36 64 MIPS R4300i 1995 64 64 ?? ?? 32 (added) Motorola 68000 1980 (below) 32 24 24 16 Motorola 68020,030,040 1985+ 32 32 32 32 32 Sun SPARC 1987 32 32 32 36 32-64 * These processors use some form of segmentation to provide more bits of user address space when necessary." This list included most of the widely-used microprocessors used/public at the time, plus the most popular mainframe and minis. Alpha, and later 64-bit SPARCs would have entries similar to R4000s. 1) When people call a processor an N-bit processor, it most often means the architectural (ISA) size of the integer registers (R), and has meant this for at least 35 years (since the world didn't start with S/360s). 2) Likewise, for many years, there have been multiple implementations of the same architecture whose physical address sizes (A) and bus widths (D) have varied widely relative to R, although bus widths are at least usually integer multiples or divisors of R. About the only consistency is that D is an integer multiple of R, or vice-versa, whereas A can be smaller than, equal, or greater than R, and there need be no multiplier/divisor ratio. 3) The Intel i860 was called a 64-bit processor because it had a 64-bit bus. In my opinion, this was simply marketing contrary to existing practice. 4) Motorola's 68K (<68020) terminology was sometimes confusing, because: it clearly has a 32-bit ISA, with different databus sizes: 68000: 16 called 16-bit, or sometimes 16/32-bit 68010: 16 called 16/32, or sometimes 16 68008: 8 called 8-bit sometimes Lumped together as a group, the term 16/32 was often used. I'm not sure what was going on, perhaps the 32-bit ISA was taken for granted, and the databus size sometimes crept in. 5) Summary: from an ISA and programmer's view, the most common usage has long been the size of the integer registers, notwithstanding occasional marketing aberrations. -john mashey DISCLAIMER: EMAIL: mash@sgi.com DDD: 650-933-3090 FAX: 650-932-3090 USPS: Silicon Graphics/Cray Research 6L-005, 2011 N. Shoreline Blvd, Mountain View, CA 94043-1389 -- -John Mashey EMAIL: mash@sgi.com DDD: 650-933-3090 FAX: 650-851-4620 USPS: SGI 1600 Amphitheatre Pkwy., ms. 562, Mountain View, CA 94043-1351 SGI employee 25% time; cell phone = 650-575-6347. PERMANENT EMAIL ADDRESS: mash@heymash.com